MD100 Technology

Features:

  • Analog cells:
    - Bandgaps
    - Comparators
    - Operational Amplifiers
    - Transconductance Amplifier
    - Oscillators (e.g. Crystal, RC)
    - Bias Circuitry
    - Switched Capacitor Filter and Amplifiers
    - Sample and Hold Circuit
  • Digital Core Library:
    - 722 standard 2-input gates
    - Over 60 core cells
    - Input, output and bi-directional buffers with and
      without pull-up and pull-down
    - Single output buffers with 2 and 4 mA drive current
    - OTP poly zapping cells
    - Low power consumption
  • Operational Power Supply:
    - 1.2 to 6V (maximal rating 7V)
  • Analog Part:
    - Special transistors for amplifiers and comparators
    - Small transistors for switch capacitor application in
      order to reduce gate feed-through
    - Long and narrow size transistors for current mirrors
      with large multiplication ratio
    - Insolated regions for the n-well of p-transistors to
      allow the use of different supply voltages (voltage
      doubling, LCD control etc.)
    - Diodes mainly usable for voltage reference circuits
    - Low and high value resistors
    - Floating capacitors
  • Miscellaneous
    - Single layer metal
    - 28 input/output pad
    - High speed operation up to typical 100 MHz toggle
      frequency at VDD = 4.5V
    - Small chip size: 1.61mm x 2.3mm
    - Multiple chip to increase complexity and/or pin
      count

 

Technology:

The MD100 component array is based on Philips 2μm SACMOS single layer metal CMOS process
resulting in a 4μm unrestricted pitch for metal. The low threshold voltage of 0.6V ±0.15V for N- and
PMOS is the base for low volt and low consumption design. Analog devices as low and high value
resistors, floating capacitors, diodes and separated N- and P-MOS transistors are the base for
implementing analog functions. On-chip zapping cells supports active trimming of analog functions
as well as unique identification and/or selection of function variants.

Development:

The developments are realized completely inside HMT’s design center. Based on a close
relationship between the customer, the production plant and the development engineer, the
development covers all items of concept analysis, pre-study, project definition, design and
industrialization under the responsibility of HMT microelectronic Ltd. For each product, a specific test
program and DUT-board is developed and
depending on request and application, an
appropriated qualification procedure is run.

Production:

The wafer production, wafer test,
packaging, final test, conditioning and
delivery of such developed ASIC’s is done
under the full responsibility of HMT
microelectronic Ltd.

Packaging:

Various package are available: SO, SSOP,
TSSOP, Die-Form. Special package on request