- Analog cells:
- 2304 analog transistors
- 524 linear capacitors
- up to 2.7MOhm PS- and 20.5MOhm NWELL res.
- Operational Amplifiers
- Transconductance Amplifier
- Oscillators (e.g. Crystal, RC)
- Switched Capacitor Filter and Amplifiers
- Sample and Hold Circuit
- Digital Core Library:
- 5536 standard 2-input gates
- Over 60 core cells
- Input, output and bi-directional buffers with and
without pull-up and pull-down
- Single output buffers with 2 and 4 mA drive current
- 64 OTP cells
- Power consumption: typical 0.35μA/Gate/MHz
- Operational Power Supply:
- 1 to 5.5V (8V for I/O’s)
- IP Cores:
- LCD driver
- Low consumption voltage doublers
- Low drop voltage regulator
- I2C interface
- 64 bit of UV-erasable EPROM cells
- Double layer metal
- 4 layer routing
- 32 input/output pad
- High speed operation up to typical 250 MHz toggle
frequency at VDD = 5V
- Small chip size: 2mm x 2.18mm
- Multiple chip to increase complexity and/or pin
The MD500 component array is based on Philips C175SC double layer metal CMOS process with effective channel length of 0.9μm transistors (shrinked process option). The low threshold voltage of 0.6V ±0.15V for NMOS respectively 0.8V ±0.15V for PMOS is the base for low volt and low consumption design. Analog devices as low and high value resistors, floating capacitors, diodes and separated N- and P-MOS transistors are the base for implementing analog functions. On-chip EPROM supports active trimming of analog functions as well as unique identification and/or selection of function variants.
The developments are realized completely inside HMT’s design center. Based on a close relationship between the customer, the production plant and the development engineer, the development covers all items of concept
analysis, pre-study, project definition, design and industrialization under the responsibility of HMT microelectronic Ltd. For each product, a specific test program and DUT-board is developed, and depending on requirement and application, an appropriate qualification procedure is undertaken.
The wafer production, wafer test, packaging, final test, conditioning and delivery of such developed ASIC’s is done under the full responsibility of HMT microelectronic Ltd.
Various package are available: SO, SSOP, TSSOP, Die-Form. Special package on request.