HMT7745 GENIE IO-Link DEVICE PHY IP

HMT7745 application with external μC

The GENIE IO-Link IP DEVICE PHY IP is a low-level silicon IO-Link transceiver core which interfaces between a sensor or actuator control block and a 24V power and signalling cable.

Features:

  • Integrated UART peripheral with M-sequence handling (inc. checksum)
  • Quartz-free IO-Link clock extraction and frame generation at 38.4kBaud and 230.4kBaud
  • High-side, low-side or push-pull outputs (<10Ω)
  • Fast switching time (<1μs)
  • Configurable short circuit current limit
  • Zener limits for rapid inductive load switch off
  • 5V to 35V supply range
  • Configurable 5V or 3.3V, 50mA linear regulator
  • Optional fully protected secondary output
  • Optional dc-dc regulator module
  • Full zero-current reverse polarity protection
  • Over-voltage protection to 35V
  • Configurable under-voltage detection
  • ESD protection to 4kV
  • EMC surge protection to IEC 60255-5 (2A/50μs)
  • Thermal shutdown, configurable level protects neighbouring devices and packaging
  • Temperature measurement
  • IO-Link conformal data thresholds or 50% of VPLUS, suitable for operation down to 5V

Description:

The IP is a combination of digital HDL and analogue components with a fixed layout. It provides an efficient path for the realisation of application specific sensor IC's, which tap the advantages of the IO-Link protocol either for operation or just during configuration.

The use of a IP reduces design time, risk and cost, and provides known EMC performance at the outset.

It is anticipated that the IP is used in conjunction with an on-chip microcontroller-like function (eg. HMT7746 GENIE Mini-stack IP) realising single-chip sensor devices, or with an off-chip microcontroller, where the chip includes further digital or analogue functions.

The IP is available in two process nodes (0.8μm and 0.35μm), providing optimised process selection dependent on the application.